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My Professional Journey

Professional Milestones

Click to see responsibilities and more details
  • Advising executive and engineering leadership on IC manufacturing test strategies
  • Implementation and optimisation of test concepts from Design-for-Test, pattern and test program development to high-volume manufacturing
  • Manage NPI and yield optimisation phases from proper ramp-up target setting to management of operational issues towards financial objectives
  • Support market entry and business development for test tool and equipment suppliers, e.g. European go-to-market strategy, selection of strategic customers, manage customer engagement
  • Guide start-ups through setup and funding phases, leveraging technical expertise and contacts e.g. to critical suppliers and potential customers
  • Support organisation’s transition into new company after acquisition
  • Hands-on software development (C++, Python) for IC qualification and test
  • Responsibilities: Design-for-Test, test program development, yield management – execution as well as respective methodologies, EDA tools and HVM equipment selection
  • Target application: Cellular modem chipsets (RF-Transceiver, Power Management, Digital Baseband)
  • Managing engineering teams in Germany, China, Malaysia, US – about 250 heads total
  • Responsibilities: Digital and analog Design-for-Test methodology & tools, test program development tools, i.e. program generators and verification tools
  • Target applications: Automotive, communications (wired, wireless), smart cards
  • Managing teams in Germany, Austria, and China − about 80 heads total
  • EDA tool developer for Philips Semiconductor’s (now NXP) in-house test tool infrastructure

Education & Publications

My professional career is based on an academic background in electrical engineering, including a PhD, as well as teaching and research activities throughout my entire career, resulting in multiple technical publications in the field of test and Design-for-Test methodologies and implementation.

    • PhD in Electrical Engineering, University of Bremen, Germany
    • Diploma Electrical & Communications Engineering, University of Hanover, Germany
    • Author of multiple publications in DfT and test methodology (selection below)

Publications (Selection)

    • Poehl, F.; Demmerle, F.; Alt, J.; Obermeir, H.; Production test challenges for highly integrated mobile phone SOCs – A case study; Invited Talk, 15th IEEE European Test Symposium, 24-28 May 2010, pp. 17–22
    • Poehl, F.; Beck, M.; Arnold, R.; Rzeha, J.; Rabenalt, T.; Goessel, M.; On-chip evaluation, compensation and storage of scan diagnosis data; Computers & Digital Techniques, IET, Volume 1, Issue 3, May 2007; pp. 207–212
    • Poehl, F.; Beck, M.; Tamarapalli, N.; Kassab, M.; Arnold, R.; Muhmenthaler, P.; Mukherjee, N.; Rajski, J.; Industrial experience with adoption of EDT for low-cost test without concessions; International Test Conference; Sept. 30 – Oct. 2, 2003; pp. 1211–1220